Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic devices. As the demand for shrinking electronic devices has grown, a need for smaller and more creative packaging techniques of semiconductor dies has emerged. Thus, packages such as wafer level packaging (WLP) have begun to be developed. For example, semiconductor devices are fabricated by sequentially forming various material layers and structures over previously formed layers and structures. Due to varying coefficients of thermal expansion (CTEs) of different materials, thermal issues during the fabrication process may lead to warpage of the semiconductor devices.
Moreover, in the manufacturing of semiconductor devices, a grinding process is performed to reduce the thickness of the structures. As the final thickness of the semiconductor device shrinks, damage caused by the grinding process becomes a bigger concern. For example, in a conventional grinding process, vacuum leakage may occur at the edge of the structure due to warpage. In addition, a grinding process may result in a grinded surface having unacceptable total thickness variation (TTV). Moreover, a structure to be thinned having a smaller thickness is warped at its periphery and becomes easily cracked during the grinding. Furthermore, over-grinding may occur and cause damage to a portion of the structure, thereby leading to yield loss. Therefore, there is a need for an improved method and system for thinning semiconductor devices.